how the Tandy Pocket Computer systems received a sucky Japanese assembler
However this explicit odd little assembler dialect had the bureaucratic weight of the Japanese authorities behind it, as a result of in 1969 what was then the Ministry of Worldwide Commerce and Business (MITI, 通商産業省) developed a very synthetic processor structure to assist guarantee everybody taking the Data Expertise Engineer Examination (情報処理技術者試験) would accomplish that on an excellent keel. Nobody would have been an professional on this structure or how you can program it as a result of we simply made it up, reasoned the Ministry, so due to this fact nobody may have an unfair benefit on the check.
After all, that lasted only some years earlier than the specs received out, and shortly afterwards a handful of Japanese producers had added it to their computer systems as a characteristic — together with their pocket pc line. By the magic of Tandy badge engineering, two of them made it to Radio Shack shops in the USA within the mid-Nineteen Eighties, perplexing a era of larval nerds like me who could not perceive what the heck it was doing there. Whereas it was no secret the Tandy PC-5 and Tandy PC-6 Assembler characteristic was a faux, few individuals knew its historical past or ever did an in depth exploration. Let’s dig into the darkish and gloomy corners of this completely bogus digital CPU that a number of actual computer systems ran — form of — and write our personal cross-assembler and digital machine in order that future geeks might be simply as befuddled.
In 1970 (昭和45年) the Japanese Nationwide Food plan handed the Promotion of Information Technology Act (情報処理の促進に関する法律), which amongst different modifications formalized a certification examination for “info expertise engineers” (情報処理技術者). This check, in an up to date kind, continues to be administered at present and is the second-most taken nationwide examination in Japan after the motive force’s license examination, with as many as half 1,000,000 individuals sitting for it yearly. Those that go the Data Expertise Engineer Examination (henceforth ITEE) obtain an Data Expertise Engineer Examination Certificates (情報処理技術者試験合格証書) from the Minister of what’s now referred to as the Ministry of Economic system, Commerce and Business (経済産業省), the successor to MITI. Initially created by then-MITI and at present maintained by METI’s subordinate Information Technology Promotion Agency, the ITEE these days is run in two halves over a complete day and is available in 4 ability ranges. Whereas an ITEE certificates is just not a authorized requirement to do IT work in Japan, it’s thought-about very useful and a gateway to different exams or instructional alternatives, and public establishments hiring such positions will typically checklist a number of of the degrees (and/or subcategories) as a prerequisite. A smattering of nations exterior Japan even settle for it as a credential.
In contrast to many trade certification exams, nonetheless, the ITEE would not primarily deal in particular distributors or platforms; as a substitute, it seeks to check extra generalized data reminiscent of technique, venture administration, knowledge buildings and algorithms. There have been solely two tiers when the check was first established in 1969 (previous to the Act), particularly class I (superior) and sophistication II (fundamental), at present mixed as subcategories within the fashionable degree two examination.
As a part of the check, each examination lessons allowed you to pick out questions within the programming language you felt most competent at, which at that time consisted of Fortran, COBOL, PL/I, ALGOL and meeting language. To eradicate an examinee’s data of a specific CPU as being a bonus (or drawback), the assembler questions as a substitute used a easy and utterly contrived digital machine that the examinee was anticipated to study on the fly. This digital machine was referred to as COMP-X, and its mnemonics and assembler syntax have been collectively referred to as CAP-X.
Whereas COMP-X and CAP-X have been at all times optionally available on the category II examination and you might skip it by selecting one of many different languages, in 1977 it grew to become necessary for the category I. The go charge was by no means very excessive (even at present it hovers across the ten % vary or so) and till 1979 there wasn’t even a reference textual content for COMP-X that you might research from. You solely received to see it the day of, and the one pc that it ran on then was between your ears with a pencil as your co-processor. Because you have been doing all of the quantity crunching on paper, there weren’t any I/O directions both since they would not be wanted to reply the examination questions.
Most likely the very first pc that might run CAP-X code — in a simulator, thoughts you — was one of many OKITAC-4300 line, which stood for Oki Transistor Computerized Laptop. Oki Electrical’s OKITAC sequence was various, beginning in 1960 with the 4000-transistor OKITAC-5080, the primary Japanese home pc to make use of core reminiscence, and increasing to massive programs and mainframes together with the deliberate 1971 OKITAC-8000 that was 32-bit, twin CPU and supported as much as a full megaword of complete reminiscence to compete straight with IBM’s System/360.
Nonetheless, though it was accomplished, the 8000 could not be launched resulting from an present three way partnership association with Sperry Rand (now a part of Unisys), with which it could compete additionally. Through the 8000’s finally doomed growth Oki decided that the minicomputer market might give them one other manner out. The 1968 OKITAC-4300 was the primary of those smaller machines, a 16-bit system supporting as much as 32kW of core reminiscence and working at about 667kHz, and retailing for the comparatively cheap equal of round US$10,000 (in 2024 about $88,000). It grew to become a profitable structure for Oki and 4300-class programs have been manufactured effectively into the early Nineteen Eighties, the final of which being the 1980 4300c proven right here in a 2010 Oki product retrospective.
This explicit machine is a 1974 OKITAC-4300b, the primary with an LSI CPU, providing multiplication and division directions commonplace as a substitute of an choice. It was additionally the primary OKITAC-4300 system that might use standard RAM chips as a substitute of core, although the core variant was noticeably sooner (1.667MHz in comparison with 1.429MHz). As a public service, Oki Electrical partnered with a research group in Akashi in October 1979 to develop a COMP-X simulator on a 4300b and permit research group members to ship in solutions to observe questions for execution. COMP-X and the OKITAC LSI CPU weren’t particularly related architecturally aside from each being 16-bit and having some related minicomputer idiosyncrasies — which we’ll focus on — however the CAP-X instruction set was sufficiently small to make a full software program mannequin sensible. As a result of there was no different option to remotely debug pattern code, the simulator added unofficial learn and write directions to straight deposit and look at knowledge in COMP-X registers.
With the specification now public in major Japanese computer magazines like I/O, there have been definitely different software program implementations for the house and private computer systems of the time, however the structure grew to become a possible promoting level for different small programs — actually small ones. Certainly, most likely CAP-X’s most well-known industrial implementations have been in pocket computer systems.
It may be instructive first to speak about pocket computer systems as a category. Pocket computer systems and handheld computer systems occupied a wierd area of interest within the Nineteen Eighties and really early Nineteen Nineties sandwiched between calculators and extra standard moveable computer systems (laptops, moveable workstations and so forth), largely utilizing bespoke low-power CPUs and small, generally single-line LCD screens. There’s considerably of a continuum between pockets and handhelds; pockets tended in direction of portability at the price of keyboard or computing energy whereas handhelds tended in direction of computing energy at the price of measurement, so on the “undoubtedly a pocket pc” aspect can be issues just like the Casio PB-100 and Sharp PC-1250, and on the “undoubtedly a handheld pc” aspect can be issues just like the Kyotronic 85 household (TRS-80 Mannequin 100, NEC PC-8201A, and so forth.), the Texas Devices CC-40 and the Canon X-07. Nonetheless, there have been bigger pocket computer systems highly effective sufficient to rival handhelds such because the Sharp PC-1500, the Casio PB-2000C, the Panasonic HHC-4 and the Texas Devices TI-74, and some full-size handhelds that had computing capabilities extra typical of pocket computer systems, just like the VTech Laser 50. As with most computer systems of this period, the overwhelming majority of each computing lessons offered BASIC as their major programming language.
Whereas many firms made pocket-class machines, Sharp and Casio have been most likely the most effective recognized and most prolific, and their units are those mostly encountered within the West. They have been additionally cloned and rebadged each domestically and overseas, and each firms made pocket computer systems that carried out CAP-X compatibility as a secondary characteristic. Sharp’s 1985 PC-1440 was a 4K machine (3500 bytes free) utilizing the 8-bit Hitachi SC61860 CPU employed in a few of Sharp’s different programs. The PC-1440’s CPU may very well be straight programmed with BASIC PEEK, POKE and CALL, just like their larger and extra highly effective PC-1500, however the one advertised meeting language characteristic on the PC-1440 was CAP-X. In 1986 Sharp made a less expensive variant with barely much less reminiscence, the PC-1416G. Each programs prominently badged their case with their CAP-X functionality however neither of them was extensively seen exterior of Japan.
Casio’s items grew to become a lot better recognized, nonetheless, not least of which due to who imported them. These early-generation Casio pocket computer systems have been based mostly across the Hitachi 8-bit HD61700 and 4-bit HD61900 microcontroller households, reminiscent of the favored PB-100 and its many kin which used a 200kHz HD61913. The microcontrollers integrated the CPU, masks ROM, I/O (primarily for the keyboard) and an LCD controller right into a single monster IC, with many of the RAM often in separate chip(s). Casio’s CAP-X appropriate line began with the 1985 FX-770P, a clamshell folding machine with 2K of RAM, increasing to the 1985 FX-780P with 4K, the FX-781P with 2K once more (however with a 2K enlargement choice), the FX-785P additionally with 2K (however an 8K enlargement choice), the 1986 FX-790P with 8K (and the 8K choice), and the FX-791P with 10K (and the 8K choice additionally). All of those machines had precisely the identical kind issue and LCD with principally the identical onboard software program and keyboard, differing solely in Knowledge Financial institution options within the FX-785P and up and reminiscence measurement. In contrast to Sharp’s entries, nonetheless, the Casio units carried no point out of CAP-X or COMP-X on the case, merely that that they had an “Assembler” mode.
I discussed that each Sharp and Casio pocket computer systems have been cloned and rebadged, and a minimum of in the USA and for many international locations that had a Radio Shack retail presence, essentially the most vital of those rebadgers by far was the Tandy Company. Whereas Tandy did have inside growth sources, they often most well-liked to broaden their product line by way of aggressive badge engineering as a substitute, promoting a smattering of relabeled import shopper electronics direct to clients in Radio Shack shops. Tandy’s first pocket computer, the 1980 PC-1, was a rebadge of the Sharp PC-1211, the direct successor and upgraded RAM model of the PC-1210, the primary “true” pocket pc. Tandy chosen two extra Sharp items to rebadge (and yet another a number of years later) earlier than migrating to Casio’s cheaper line in 1983 with the PC-4 (PB-100) and at last the 1985 PC-5 and 1986 PC-6 (from the FX-780P and FX-790P respectively), the items that got here to puzzle younger me studying about them within the Radio Shack catalogue. And that is how CAP-X got here to America.
Tandy’s curiosity most likely most got here from the FX-770P sequence’ laptop-like kind issue (right here exhibiting the PC-5/FX-780P in contrast with an M1 MacBook Air), however as 2K of RAM wasn’t a lot of an improve over the 1K base PC-4 which Tandy was nonetheless promoting, the corporate as a substitute selected to begin with the midrange 4K FX-780P. The association was significantly handy for Tandy as Casio had fitted the FX-770P sequence with the identical I/O port because the PB-100 and kin, so the identical tape interface and printer Tandy was already promoting for the PC-4 would work for the PC-5 and PC-6, although that they had to make use of a moderately clumsy hyperlink cable to attach them. The FX-780P was offered formally because the Tandy Pocket Scientific Laptop PC-5 to emphasise its scientific and statistical options (as was the PC-6), and the PC-5 would be the unit we’ll consider at present because it was the primary on these shores.
Sadly, you may’t actually use it like a laptop computer (evaluate with the Tandy 600) as a result of the alphabet, image and some operate keys are on an obnoxious membrane on the highest, with quantity, scientific and the opposite operate keys on extra correct Chiclets on the underside. This actually makes thumb typing tough, by the best way.
It is also not advisable to place it completely flat as a result of the tiny hinge covers on this stuff are underneath monumental pressure, many have cracked already, they usually’re exceptionally tough to restore. As soon as they do crack, the hinge pin will not keep in and begins placing stress on the ribbon cable between the 2 sides (I’ve had this occur to me as effectively). Ensure both to place finger stress over the hinge covers as you open it to bolster them, or cowl them with a strip of sturdy tape connecting the 2 halves. Do not you retain the Commandments?
The PC-5 has 4K of RAM on board of which 3,552 bytes can be found to the consumer (the 8K PC-6 within the base configuration has 7,520 bytes free). A memory-remaining counter seems throughout program entry. The three,552 bytes can be utilized between the ten BASIC program areas, which serve kind of as a primitive mounted filesystem, or the Knowledge Financial institution, which is successfully an on-board textual content editor the place strains can be optionally handled as data with comma-separated fields.
The FX-770P household has two HD61747 microcontrollers within the prime half that function independently, the left-most CPU (the decrease “B” quantity, indicating its explicit masks ROM identifier) being the first processor. It must be famous that this isn’t a multiprocessing system as a result of just one CPU is working at any given time, frequently switching to the opposite. This isn’t an uncommon factor to search out in pocket computer systems when there are vital I/O or ROM necessities: for instance, the O.G. Sharp PC-1210 and PC-1211 have two CPUs as effectively which additionally change backwards and forwards as a result of there wasn’t sufficient ROM capability in every particular person microcontroller by itself. Every HD61747 comprises its personal ROM, controls explicit elements of the LCD and providers explicit keys, speaking with the opposite CPU by way of reserved reminiscence areas within the widespread RAM pool.
Within the PC-5/FX-780P, the HD61747B10 on the left is the principle CPU and comprises the ROM for BASIC. It providers the decrease keyboard and maintains LCD character positions 1-6 and 13-18. The HD61747B11 on the best is the secondary CPU and comprises the ROM for the calculator, CAP-X/COMP-X and the Knowledge Financial institution and driving exterior I/O units. It providers the higher keyboard and maintains LCD character positions 7-12 and 19-24. The PC-6/FX-790P has HD61747B20/B25 CPUs that are functionally equal to the B10/B11 besides for various ROMs; the PC-5 lacks the Knowledge Financial institution search mode and clearly has a decrease reminiscence measurement and ceiling. (Examine with the pathetic Tandy PC-7 which has just one CPU, and thus lacks half the ROM, half the show and lots of the PC-5’s built-in options — together with the I/O port!)
The decrease half comprises RAM, interface logic, the I/O connector and the facility provide circuit. Within the PC-5/FX-780P, RAM is offered by 4 HD61914C SRAM chips containing 1K every. The HD61914 can be the RAM chip used within the 4-bit PC-4/PB-100; regardless of the HD61747 being an 8-bit CPU internally, it solely exposes 4 knowledge strains on the bus which is identical as these settle for. The decrease board within the PC-5 has an enlargement connector that would appear to permit extra RAM, most likely with one thing like a 4K OR-4, however the connector is blocked off with a black plastic adhesive pad which additionally covers two of the SRAMs. I eliminated the pad for this {photograph}. The PC-6 has a special connector right here for Tandy’s 8K OR-8 equal and makes use of a single Hitachi HM6264A 8K SRAM as a substitute of eight HD61914s for its base reminiscence.
Though the Sharp-derived Radio Shack TRS-80 PC-2 (PC-1500) had documented PEEK, POKE and CALL instructions in BASIC to run machine language packages on its 8-bit Sharp LH5801 CPU, the one pocket computer systems Radio Shack marketed as having an meeting language characteristic have been the PC-5 and PC-6 — which as we all know by now has bupkis to do with their precise processors.
I feel I’ve tantalized you sufficient now with the historical past, so let’s lastly get to the COMP-X digital machine itself. I’ve included pictures of pages from the US home Tandy PC-5 handbook. Amusingly it comes straight out and says that the assembler is a simulation, however nowhere does it point out the place the meeting language dialect comes from — and why wouldn’t it? Hardly anyone in the USA would have even heard of this examination!
The COMP-X digital machine is a 16-bit von Neumann structure utilizing signed twos-complement arithmetic wherein program code and knowledge share the identical reminiscence and all reminiscence entry is by phrase (no bytes). Though by conference essentially the most vital little bit of a COMP-X 16-bit phrase is numbered 0, there isn’t any option to straight entry the interior construction of a phrase in items, and the VM due to this fact has no intrinsic endianness. Except for a 1-bit situation code register (CC), which is actually only a flag containing the signal bit from provides and subtracts, all registers are 16-bit as effectively. Roughly seen to the programmer are the situation code register (CC); the sequence counter (SC), higher understood as this system counter; the bottom register (BR), which is used because the MSB of the efficient handle — extra on that shortly; and three common function registers numbered GR0 by way of GR3. There are not any floating level registers, no vector registers and no stack pointer, and issues like interrupts and NMIs usually are not outlined within the spec. Execution begins the place you inform it to and the preliminary contents of the GPRs and reminiscence are undefined (in observe no implementation clears them).
Two extra 16-bit registers are actually an implementation element and are not observable by consumer packages: the instruction register (IR) comprises the worth of the presently executing instruction, and the operand register (OR) is inside storage for phrases fetched from reminiscence previous to operation. Since that is all crap anyhow, we’ll go forward and mannequin these precisely in our reimplementation later, however they may simply as simply be elided away.
The instruction set is very simple and strongly influenced by minicomputer architectures of the period, with which it has many presumably intentional similarities. There are solely 14 main instruction varieties supported by the VM, and initially simply twelve. (I ought to be aware that the historical past of CAP-X/COMP-X previous to 1979 or so may be very murky, so for comfort I’ve chosen to deal with the spec as springing totally fashioned from the top of the Emperor although it could have gone by way of numerous revisions now misplaced to historical past.) The structure is just not canonical load/retailer as a result of one of many operands often comes from reminiscence (i.e., the OR), apart from the I/O, shift (SFT) and cargo rapid (LAI) directions that use immediates. Addition, subtraction and bitshifts are all signed.
Regardless of its simplicity, this set is sufficient to be Turing-complete and to do all commonplace operations (multiplication, for instance, is simply repeated addition, and division is repeated subtraction), although after all doing so is just not essentially environment friendly. One of many greatest gaps is a whole lack of register-to-register transfers, invariably requiring a visit to reminiscence. For logical operations, the VM presents solely logical-AND and exclusive-OR, which aren’t functionally full by themselves and might’t compute all attainable Boolean operations. With logical-NOT and logical-AND we can be functionally full (successfully logical-NAND, which is functionally full all by itself), and we are able to use exclusive-OR with a real worth to implement logical-NOT, however we’ve to have a relentless and/or burn a register for that (load it with all one bits). Likewise, comparisons might be carried out with subtraction, however that additionally requires burning a register to obtain the outcome. I am going to show you some examples in a second.
I discussed that the structure lacks a {hardware} stack, however this wasn’t uncommon in minicomputer architectures of the time both, such because the well-known DEC PDP-8. For subroutine calls the PDP-8 will get round this drawback by depositing the return handle within the first phrase of the vacation spot routine, and returns bounce again out by way of that worth. COMP-X is considerably extra superior in that the JSR opcode enables you to designate any of the 4 GPRs as a hyperlink register; the present program counter plus one is put into the required register and the brand new program counter and base register are loaded from the required phrase in reminiscence. Nonetheless, additionally just like the PDP-8, this scheme would not enable a subroutine to be recursive with out extra work. To return from a subroutine, the short-term hyperlink register must be deposited in reminiscence someplace in order that JSR (which does double obligation as the decision instruction and the return instruction — in returns, the handle beforehand saved to is offered because the department goal and the brand new “hyperlink register” is rarely saved anyplace) can department to it, and if this location doesn’t change between calls, it is going to be overwritten by later calls identical to the PDP-8’s will.
Three of those directions are distinctive to COMP-X. The HJ (Halt and Leap) instruction ceases execution, leaving this system counter pointing to the required location. In a few of our examples we’ll abuse this characteristic to function a return worth. The opposite two, READ and WRITE, show and deposit the contents of the required GPR to the display screen within the radix requested (solely decimal and hexadecimal have been supported). On the pocket pc implementations, these directions essentially pause execution to both enable knowledge entry or to be sure to can learn the worth on the one line LCD earlier than it will get changed by one thing else. They have been the one I/O opcodes within the instruction set after their look within the OKITEC-4300b simulator, that means you may’t write a COMP-X “whats up world” program within the conventional sense (we’ll handle this). To the most effective of my data, the I/O directions by no means really appeared on any model of the ITEE and have been solely ever artifacts of the unofficial pc implementations.
Directions, like knowledge, are 16 bits extensive. The opcode is in essentially the most vital nybble, then the GPR being referenced (2 bits), then the GPR getting used as an index (2 bits), after which an eight-bit operand, which is often an handle. Just like the a lot later PowerPC, COMP-X has a mscdfr0 “means one thing utterly totally different for r0” phenomenon in that GR0 can by no means be an index register: if the required index register is 0, then the index is actually 0, not the worth of GR0 (like these directions in Energy ISA the place specifying zero for the register is handled as zero, reminiscent of addi).
You would possibly marvel how an eight-bit handle can specify a 16-bit handle, and the reply is the bottom register. Though the bottom register is notionally 16 bits too, its least vital byte is at all times zero. As soon as the handle is computed from the handle subject and the index register (or 0), then its LSB is mixed with the MSB of the bottom register to yield the efficient handle. Because it occurs, solely a bounce to a subroutine with JSR can change the bottom register; no different instruction can modify it. This appears to be a concession to permit subroutines some form of knowledge safety from their callers (that’s, so long as they are not referred to as recursively or reentrantly), since one web page cannot entry one other web page straight with out calling into that web page, but it surely additionally has some essential implications once we get to edge instances within the VM like when an handle or this system counter wraps.
Nonetheless, you will not want a lot of the bottom register’s vary anyway as a result of the reminiscence mannequin within the Casio items may be very constrained. Solely as much as 512 phrases’ addressing house is supported on the 4K PC-5 no matter what number of bytes are presently out there (i.e., simply two pages), and even the 8K PC-6 solely helps as much as 2048 phrases (eight). Plus, you will solely get that on both machine if that a lot reminiscence is definitely free — you probably have lower than 512 bytes of free reminiscence, the assembler will refuse to run in any respect! (No less than reminiscence enlargement can assist on the PC-6.) Once we get to reimplementing the VM later on this article, you can use a full 64kW.
As a result of the 8-bit load rapid instruction is unsigned and clears the MSB of the vacation spot register, and there’s no option to straight OR or EOR a second rapid worth after a bitshift (a la the load upper-lower or load-shift-or sample many RISCs use), loading a full 16-bit worth or any damaging worth will at all times require a fetch from reminiscence. In observe it is simpler simply to load all however small trivial non-negative values from a separate fixed pool.
The CAP-X assembler format is just like that of different assemblers, with fields for the road label (three characters max and the primary one should be a capital letter), the instruction mnemonic, the referenced GPR, the index GPR and an eight-bit rapid or handle. Nonetheless, in contrast to many different assemblers, the colon separates fields, and whitespace aside from newlines is ignored — in our examples right here we’ll line issues up good however this isn’t required and in reality wastes reminiscence. Reminiscence stress additionally explains why feedback aren’t supported both.
Not all fields want be specified: the index GPR is optionally available and interpreted as zero if neglected, and if the label subject is left clean, no label is generated (although you continue to want the main colon). As such, the actual program line on this {photograph} defines a label L1 on the present handle and is a load instruction placing the contents of reminiscence location M (beforehand outlined as a label) into GR0. If there have been an index register, it could observe the handle in CAP-X although it isn’t encoded that manner within the instruction.
CAP-X additionally specifies a handful of assembler pseudo-ops for setting code location (START), marking the tip of subroutines and most important code (END), reserving reminiscence phrases (RESV), and embedding constants (CONST for literal constants, ADCON for addresses and labels) within the emitted object code. Surprisingly, whereas CONST takes its argument in hexadecimal, the opposite pseudo-ops take arguments in decimal.
On the Casio programs, the Knowledge Financial institution is how CAP-X assembler strains are entered, utilizing it on this case as the interior textual content editor (clear it in MODE 1 with NEW#; press MODE 9 to enter the editor). The assembler assumes every little thing within the Knowledge Financial institution is program textual content, even after an END, so do not retailer your cellphone numbers within the machine you are utilizing to your white-hot COMP-X software or your supply code will not parse.
It is a good time for some examples.
:START:0 GO :READ :0:10 :READ :1:10 :ST :1:TAD :ADD :0:TAD :WRITE:0:10 :HJ :0:GO TAD:RESV :1 :END :GO
This program begins meeting (START) at location 0. It asks the consumer for 2 signed base-10 numbers (numbers out of vary or different characters do not trigger an error; the VM will simply ask you once more), depositing them in GR0 and GR1. As a result of it isn’t attainable so as to add GR1 and GR0 collectively straight, we retailer GR1 to a brief location we have outlined (TAD, marked by the RESV pseudo-op which inserts the required variety of zero phrases, right here one), after which add its contents to GR0, show it to the consumer, and halt. The END pseudo-op gives the default beginning handle to the VM and signifies the tip of meeting; all code should embody it on the finish. As soon as entered within the Knowledge Financial institution, we are able to now press the Asmbl key to enter the monitor.
When the Asmbl key’s pressed, all strains within the Knowledge Financial institution are scanned and transformed to COMP-X bytecode, and if meeting is profitable then this menu will seem (Go/Dump/Supply/Cal). The quantity at the start is the variety of pages reserved for the VM, which on the PC-5 will at all times be one or two, however on the PC-6 could also be as much as eight. The choices, so as, begin execution (G key), show both reminiscence (as phrases and disassembled directions) or the state of the registers (D key), return to the Knowledge Financial institution editor to remodel the supply (S key), or return to calculator mode (C key).
If we press G for Go, it’s going to ask for the beginning handle, defaulting to zero (for the reason that label GO is at phrase zero, and that is what we offered to END), after which run this system.
Asking for the primary register.
And, after the second is entered, the sum is reported, and the PC-5 returns to the monitor.
Let’s strive a extra substantial instance. This one is a modified model of an instance from the handbook, computing the best widespread divisor of two values.
:START:0 L0 :READ :0:10 :READ :1:10 :ST :0:M :ST :1:N L1 :LD :0:M :SUB :0:N :JNZ :0:L2 :LD :0:M :WRITE:0:10 :HJ :0:L0 L2 :JC :2:L3 :LD :0:N :SUB :0:M :ST :0:N :JC :3:L1 L3 :ST :0:M :JC :3:L1 M :RESV :1 N :RESV :1 :END :L0
After studying the specified values into areas M and N (I exploit separate registers in order that the immediate modifications when an appropriate worth is entered), this system does the equal of evaluating M and N by a subtraction, placing the lead to GR0. If GR0 finally ends up zero, then M == N, and no additional iterations have to be made; the JNZ falls by way of to the next directions wherein the contents of M are proven (the best widespread divisor for each values is essentially in each areas as a result of they’re equal) and this system ends. If the result’s 1, then that they had no different divisors in widespread.
In any other case, the CC flag is ready from essentially the most vital little bit of the outcome, i.e., its signal. If the CC flag is evident (examined by choice 2 to the bounce conditional instruction), then the results of M – N was optimistic, that means M is larger than N, and it jumps to the code at L3 storing the present worth of GR0 (that’s, M – N) again into M for one more iteration (choice 3 to the bounce conditional instruction means an unconditional bounce). In any other case, M should have been lower than N, so the code then computes N – M into GR0 as a substitute and shops GR0 into N for one more iteration, looping till M == N as above.
How swiftly does all this run? Whereas this system stream appears convoluted, if the runtime was significantly environment friendly it must be attainable to run the easier COMP-X opcodes sooner than BASIC tokens, which may generally be fairly complicated. Let’s write a model of this program that runs 100 instances and time it, utilizing a worst-case arrange like 28672 and 17 (they don’t have any widespread divisor aside from 1).
:START:0 LI :LAI :1:100 L0 :LD :0:OM :ST :0:M :LD :0:ON :ST :0:N L1 :LD :0:M :SUB :0:N :JNZ :0:L2 :SUB :1:ONE :JNZ :1:L0 :LD :0:M :WRITE:0:10 :HJ :0:LI L2 :JC :2:L3 :LD :0:N :SUB :0:M :ST :0:N :JC :3:L1 L3 :ST :0:M :JC :3:L1 M :RESV :1 N :RESV :1 OM :CONST:7000 ON :CONST:0011 ONE:CONST:0001 :END :LI
The primary time I did this I sat there for a number of minutes. Finally I received impatient, stopped this system (there is a BRK key) and altered the loop counter at LI to simply 2.
Nearly 52 seconds. That is completely potty. What about BASIC? Here’s a simpleminded conversion of the above to make the operations as related as attainable. To make the battle truthful, we’ll additionally cap it to 2 iterations.
1 L=2 2 M=28672:N=17 10 G=M-N:IF G≠0 THEN 20 11 L=L-1:IF L>0 THEN 2 12 PRINT M:END 20 IF G>0 THEN 30 21 G=N-M:N=G:GOTO 10 30 M=G:GOTO 10
It’s best to be capable to establish the identical steps we’re taking (I am additionally modeling the identical concept of placing math outcomes into an intermediate register like what COMP-X has to do) and the identical sections of code. Though a comparatively vanilla BASIC, Casio Pocket Laptop BASIC was notable for having precise characters for not equals, larger than or equal to, and so forth., as a substitute of the extra typical BASIC compound operators.
Labouriously keying it in, which actually makes you marvel what Casio was pondering with the cut up keyboard method as a result of for many of those strains you must bounce backwards and forwards between halves. Then again, it did keep the shifted fast entry tokens of earlier items just like the PB-100, so typing is quicker than it appears to be like.
Anyway, a few of you’ll be anticipating the large reveal that BASIC will run rings round COMP-X. Heck, I was anticipating that. Drum roll please.
Drum roll please.
Drum roll … is that this factor accomplished but?
It isn’t even shut. At 52 seconds versus 346 seconds, COMP-X does the identical computations almost seven instances sooner. There are apparent methods to enhance the BASIC code (on a fast first go we are able to rework a pair pointless jumps) but it surely’s unlikely even a maximally optimized model would run anyplace close to as rapidly because the COMP-X unique. Let’s hear it for utterly contrived bolted-on digital machines!
That mentioned, whereas each packages are interpreted, they’re each additionally working on a intentionally underpowered set of CPUs to eke out as a lot battery life as attainable, so we should not be shocked their respective run instances completely stink. If you would like the reply rapidly, go purchase a Cray.
You may have seen from this instance that the CC flag is not a carry flag (it is the signal bit), so how is overflow handled? Let’s reply that query.
:START:0 L :LD :0:M :ADD :0:M :WRITE:0:10 :HJ :0:L M :CONST:7FFF :END :L
That is proper: it throws a deadly exception. The present worth of the sequence counter (program counter) is reported for debugging functions. (The outcome would naturally be FFFE or -2, not +65534.) The identical factor occurs if we add one other fixed for 1 and add that as a substitute of itself, or if we underflow with subtraction as a substitute — something that may change the signal unexpectedly will get an error. Bafflingly, the handbook says that “[o]verflow can be disregarded on this case.” Which overflow would that be, precisely?
I get why they did this and it eliminates a specific class of bugs, but it surely additionally makes wider sums far more tough. If we wish an unsigned add with carry so we are able to deal with bigger numbers, we’ll want to bop round these operations that might trigger the VM to fault. Here is one resolution, which I do not declare is perfect nor covers all edges. It ass-U-mes you’re including one unsigned worth to a different. Maintain on to your ankles:
:START:0 L :READ :1:16 :ST :1:M :AND :1:BM1 :ST :1:TM1 :READ :0:16 :ST :0:N :AND :0:BM1 :ADD :0:TM1 :ST :0:TM1 :AND :0:BM1 :ST :0:TM2 :LD :0:TM1 :SFT :0:8 :ST :0:TM1 :LD :0:M :SFT :0:8 :AND :0:BM1 :ST :0:TM3 :LD :0:N :SFT :0:8 :AND :0:BM1 :ADD :0:TM3 :ADD :0:TM1 :ST :0:TM3 :AND :0:BM1 :ST :0:TM1 :SFT :0:8:1 :EOR :0:TM2 :LD :1:TM1 :AND :1:BM2 :JNZ :1:FIX X :LD :1:TM3 :SFT :1:8 :AND :1:ONE :WRITE:0:16 :WRITE:1:16 :HJ :0:L FIX:EOR :0:NEG :JC :3:X M :RESV :1 N :RESV :1 BM1:CONST:00FF BM2:CONST:0080 NEG:CONST:8000 ONE:CONST:0001 TM1:RESV :1 TM2:RESV :1 TM3:RESV :1 :END :L
We ask for the arguments in hex this time, since we’re coping with unsigned values (if we did it in base 10, it could anticipate indicators). This routine successfully does the addition in two steps byte by byte as we can not straight add the numbers collectively. We begin with the LSBs of every worth by masking off their MSBs and retailer the sum, masks it once more to generate the LSB of the reply, then shift down the MSB of the unique outcome because the carry. We then transfer to including the MSBs of every worth (by shifting them down), masking them to their LSBs for the reason that shift is signed, and likewise including the carry from the LSBs on the identical time.
At this level you’d assume the rest is merely a matter of then shifting the MSBs again into place and OR-ing within the 8-bit sum of the LSBs (we use an EOR, which is okay as a result of the shift leaves a clear decrease half). Nonetheless, bear in mind shifts are additionally signed, which might obliterate the excessive signal bit as a result of these values are all “optimistic,” so after the shift-and-EOR we glance again at what the MSB outcome was as a byte worth. If this byte is 128 or greater, then we all know we have to restore essentially the most vital bit, which we EOR on at FIX. The routine ends with the low 16 bits of the sum in GR0 and the seventeenth bit in GR1, which we masks off all however the least vital little bit of earlier than displaying the 2 outcome registers.
What a ache! Different ideas solicited within the feedback. Anyway, the same old edge instances appear to work, like 8000 + 8000 appropriately equals 1 0000 (as does FFFF + 0001), FFFF + FFFF = 1 FFFE, 7FFF + 1 = 0 8000 and 7FFF + 7FFF = 0 FFFE. Subtraction is left as an train for the supremely masochistic reader.
Since we have began entering into the bloodied buzzsaw of edge instances, let us take a look at another darkish corners of CAP-X/COMP-X. (I must also be aware that the behaviour we are going to doc on this article is noticed on the Casios, not on the much less widespread Sharp fashions, and it’s attainable a number of the edge instances might behave otherwise.)
We all know we are able to change areas we reserve within the assembler supply, however can we modify our personal program code? It seems we are able to, and though self-modifying code is understandably discouraged in fashionable observe, in a language this constrained the power to take action can simplify some duties. First, let’s have a look at what occurs with an unlawful instruction. There are not any COMP-X directions with an opcode nybble of seven or 9, however we are able to make one with CONST.
:START:0 L7 :CONST:7000 L9 :CONST:9000 :HJ :0:0 :END :L7
When you begin this with Go to both label L7 or L9, the outcome is identical apart from the place the fault is:
Our subsequent check is to substitute an invalid instruction with a legitimate one. We all know it will crash if it hits the bogus instruction, but when the halt-jump replaces it, it ought to terminate usually (with SC set to 65).
:START:0 L :LD :0:OPC :ST :0:PTR PTR:CONST:7000 OPC:HJ :0:65 :END :L
And it does (we are able to see the results of SC by both dumping the registers or “going once more,” which I did right here, which is able to use the present worth). Likewise, we get a crash by changing a legitimate instruction with an unlawful one, principally reversing the 2 directions in the identical code:
:START:0 L :LD :0:OPC :ST :0:PTR PTR:HJ :0:65 OPC:CONST:7000 :END :L
This faults, as anticipated.
Let’s subsequent take a look at the sides round efficient addresses: we are able to modify an handle with an index register, so what occurs when the outcome wraps? That brings us again to the bottom register and the way web page segmentation is carried out. Within the typical case, we begin with a pointer and modify it with an index, and if all of it stays in the identical 256 phrase web page, then every little thing happens as anticipated. For instance,
:START:0 NP :CONST:0001 W :CONST:0000 W2 :CONST:0000 :START:128 L :LD :1:NP :LAI :0:65 :ST :0:W:1 :HJ :0:L :END :L
(Sure, you may have a number of STARTs. You may even have them overlap: later code will overwrite earlier code, which does not appear to be a good suggestion.) Recall that GR0 can by no means be an index. We load GR1 with the index offset (1) and GR0 with a sentinel worth (65), then retailer GR0 to location W with GR1 added to it. On the finish W stays 0 and W2, the phrase one up (W + 1), is 65. We will show that by dumping that reminiscence location from the monitor (“object” on this case refers to reminiscence):
This stays legitimate even when you go it a damaging index. If we modified NP to FFFF (i.e., 65535, or -1 as a signed 16-bit integer), then the efficient handle can be zero, and this system will overwrite its personal fixed!
What if W and W2 are in separate pages? I discussed that that is the place the bottom register comes into play. Solely the least vital byte of the computed handle is used; essentially the most vital byte comes from the bottom register. Which means when you run
:START:0 NP :CONST:0100 W :CONST:0000 :START:128 L1 :LD :1:NP :LAI :0:65 :ST :0:1:1 :HJ :0:L1 :START:256 :CONST:0200 W2 :CONST:0000 :END :L1
you may’t use the pointer NP to entry reminiscence within the subsequent web page; the shop will happen to W and never W2 although our index is 256. The identical factor occurs when you do
:START:0 NP :CONST:0002 W :CONST:0000 :START:128 L1 :LD :1:NP :LAI :0:65 :ST :0:255:1 :HJ :0:L1 :START:256 :CONST:0200 W2 :CONST:0000 :END :L1
and even
:START:0 NP :CONST:00FF W :CONST:0000 :START:128 L1 :LD :1:NP :LAI :0:65 :ST :0:2:1 :HJ :0:L1 :START:256 :CONST:01FF W2 :CONST:0000 :END :L1
That brings up this fascinating scenario the place a pointer to phrase 513, which must be unlawful on a PC-5, really turns right into a pointer to phrase 1 and overwrites itself. This program terminates usually, however may have corrupted its personal bytecode within the course of.
:START:0 L :LD :0:PTR :ST :0:PTR :HJ :0:0 PTR:CONST:0201 :END :L
The wrapping works even when the ensuing efficient handle is damaging.
:START:0 W :CONST:0000 NP :CONST:FFFF :START:128 L :LD :1:NP :LAI :0:65 :ST :0:W:1 :HJ :0:L :START:255 W2 :CONST:0000 :END :L
This does not fault both even supposing in signed math 65535/FFFF equals -1, making the efficient handle 0 + -1 == -1. The entry stays clipped to the present web page regardless, so on the finish of execution, W2 at phrase 255 (that is hex FF for everyone conserving rating at dwelling) is 65.
There’s merely no option to write to (or, for that matter, learn from) one other web page exterior of the web page presently executing. So … how about we make the program counter wrap? Sadly, we get our first clue this does not make CAP-X glad once we attempt to merely generate code straddling a web page boundary.
:START:255 L :LAI :0:0 :HJ :0:L :END :L
This would possibly not even assemble; the message Error1 typically comes up once we’ve overflowed a specific tract of reminiscence, such because the label house or the present web page.
This variant will assemble, and has a halt-jump at 256. Nonetheless, you will additionally discover that I’ve additionally put a halt-jump at 0 with a special SC.
:START:0 :HJ :0:63 :START:255 L1 :LAI :0:0 :START:256 :HJ :0:65 :END :L1
This system begins at phrase 255. If we are able to wrap into the following web page, we should always get a last SC of 65; if we will not, the SC at 0 can be 63 (numbers picked randomly and don’t have any significance in any other case). Wanna guess what SC can be on the finish? It certainly ends cleanly, however SC is 63, not 65. This wrapping may appear inexplicable, but it surely was additionally seen on different closely page-oriented CPUs like the Texas Instruments TMS1000, which limits execution to the web page within the web page buffer register.
What if we attempt to use an index register to springboard us into the following web page? Identical factor:
:START:0 :HJ :0:63 :START:253 L1 :LD :1:NP :JC :3:0:1 NP :CONST:0100 :START:256 :HJ :0:65 :END :L1
Right here, we’re including 256 to the handle of zero handed to the unconditional bounce (JC:3). This system terminates cleanly, however SC continues to be 63, not 65.
:START:0 :HJ :0:63 :HJ :0:64 :START:253 L1 :LD :1:NP :JC :3:1:1 NP :CONST:00FF :START:256 :HJ :0:65 :HJ :0:66 :END :L1
What if we simply give it 255 so all of it matches within the low byte after which add 255 to 1 within the unconditional bounce? No cube, SC is 63 (not 64, 65 or 66 — contemplate why I may need put these in as checks).
That is very totally different from segmentation schemes just like the 8086’s the place you may have a number of totally different paths to the identical reminiscence location and segments might be steady. In COMP-X the one manner you can entry knowledge in different pages is to execute from these different pages, and just one instruction can transfer execution into one other web page: JSR. This snippet writes a price into the right location by calling a subroutine within the new web page to do it. Discover that the handle continues to be three!
:START:0 L :LAI :1:65 :JSR :0:NP :HJ :0:0 W :CONST:0000 NP :ADCON:NPC :START:256 NPC:ST :0:LR :ST :1:3 :JSR :0:LR W2 :CONST:0000 LR :CONST:0000 :END :L
That is our first use of ADCON to insert the handle of the NPC routine, since CONST (arbitrarily?) would not settle for labels. Though the shop NPC makes at phrase 257 has an handle of three, the bottom register is now 1 (+256) and due to this fact the shop goes to W2 (phrase 259), not W (phrase 3).
Thus, on the finish, W2 is lastly 65 and W is 0, as anticipated.
Armed with this info, we are able to assemble code longer than one web page so long as we’ve this linking stanza straddling the web page boundary (in daring):
:START:253 L :LAI :1:65 :JSR :0:NP NP :CONST:0100 :START:256 :HJ :0:65 :END :L
The JSR brings execution over the road to the following web page, utilizing the code pointer at NP (you’d have a special pointer and an identical START for every web page boundary) and throwing away the return handle in GR0, and execution ends cleanly with SC set to 65.
As inconvenient as this association is, an fascinating consequence is that you may virtually by no means have an out-of-bounds entry to reminiscence besides if the bottom register will get out of vary of the allotted most. That may solely occur with a JSR instruction that was given a bogus code pointer, reminiscent of
:START:0 L :JSR :0:DIE DIE:CONST:FFFF :END :L
That is the COMP-X equal of a segmentation fault, and the one manner such a situation might be triggered, assuming we’re coping with a system with lower than 64kW out there (just like the PC-5 and PC-6). In any other case, we by no means have to fret about unlawful masses and shops as a result of we’ve no manner of placing directions in an unlawful web page to execute — sucks for programmers however easy for the VM designers. Surprisingly, in contrast to the opposite two exceptions, this exception would not present the unlawful worth of the sequence counter or what set it.
Let’s tie this room along with the rug of a sport. I will be crass sufficient to advance that this can be the primary sport ever written for CAP-X/COMP-X. When you did one, put up within the feedback. I labouriously typed this into an actual PC-5, so I do know it really works. The sport itself is Rock, Paper, Scissors.
:begin:200 l:jsr:0:xoi :lai:0:0 :st:0:you :st:0:me lup:learn:1:10 :and:1:bit :st:1:yom :jnz:1:rps :jc:3:lup rps:jsr:0:xoj :and:3:bit :st:3:mem :jnz:3:shm :jc:3:rps shm:write:3:10 sam:eor:3:yom :jnz:3:tpa :jc:3:sho tpa:ld:3:mem :eor:3:bit :jnz:3:paa :eor:1:bio :jnz:1:paa :jc:3:lus paa:ld:3:mem :ld:1:yom :eor:1:bit :jnz:1:sco :eor:3:bio :jnz:3:sco :jc:3:win sco:ld:3:mem :sub:3:yom :jc:1:lus win:lai:0:1 :add:0:me :st:0:me :jc:3:sho lus:lai:1:1 :add:1:you :st:1:you sho:ld:0:me :ld:1:you :write:0:10 :write:1:10 :jc:3:lup you:const:0000 yom:const:0000 me:const:0000 mem:const:0000 bit:const:0003 bio:const:0001 xoi:adcon:xoc xoj:adcon:xos
This primary half is the sport loop. It units up its variables and asks to your transfer, the place 1 = paper, 2 = scissors and three = rock, and rock smashes scissors, scissors lower paper and paper covers rock. It then will get a random quantity and shows that as its transfer. It checks that the 2 strikes weren’t the identical (utilizing EOR; if that’s the case, tie with no rating) and that there wasn’t a paper-rock setup (if that’s the case, paper wins), after which determines which is the upper worth and awards them some extent. Its rating is printed, adopted by your rating, and the sport repeats.
The 2 pointers on the finish are into this set of subroutines that compute a pseudorandom quantity utilizing an Xorshift 16-bit variation. The primary routine initializes state, and the second generates a quantity between 0 and 32767. Discover we save our return handle earlier than coming into.
:begin:256 rtn:resv:1 xot:resv:1 xoc:st:0:rtn :jnz:3:xod :lai:3:1 xod:st:3:xot :jsr:0:rtn xos:st:0:rtn :ld:3:xot :sft:3:7:1 :eor:3:xot :st:3:xot :sft:3:9 :eor:3:xot :st:3:xot :sft:3:8:1 :eor:3:xot :st:3:xot :jsr:0:rtn :finish:l
This considerably abuses the probability of GR3 having stale knowledge in it, and as such employs it as a seed (guaranteeing it is nonzero, after all). It then does all of the wanted shifts to return one other pseudorandom quantity, which the sport clips to the 1-3 vary as its transfer.
That is just about the breadth of CAP-X/COMP-X as carried out on the Tandy Pocket Computer systems, and with these sorts of weird limitations I feel it makes a stellar unintentional esoteric programming language. A lot so, in truth, that I’ve reimplemented it as a Perl-based assembler, disassembler and runtime I’ve christened “CRAP-X,” which you can find on Github. It consists of full documentation of not solely itself but additionally CAP-X/COMP-X since most of these sources are in Japanese. There are some things I did enhance upon:
- The runtime now helps an addressing house of as much as a full 64 kilowords.
- When you specify a radix (base) of 0 to READ or WRITE, then it’s going to both learn an ASCII character from commonplace enter into the register, or write an ASCII character within the register to plain output. Now we are able to lastly write a proper hello world! Sorry, although we might assist one thing like UCS-2 this manner, it is presently restricted to 7-bit ASCII for simplicity.
- I additionally added a radix (base) 1 for them as effectively which simply reveals/accepts signed decimal numbers with out all the opposite nonsense.
- You may have feedback, delimited by both ; or #.
- Labels might be greater than three characters, although every little thing continues to be case-insensitive.
- You may specify hexadecimal addresses/immediates with a previous $ to these directions and pseudo-ops anticipating a decimal argument (CONST is at all times hex, however the $ is accepted and politely ignored when you embody it).
- CONST can take labels now, making ADCON kind of right into a synonym.
When you present the -pc5 or -pc6 arguments to the assembler or runtime, then these modifications are turned off and the reminiscence limits of the respective unit are enforced, so you may write and check code on the Perl runtime earlier than labouriously keying it into your Casio-Tandy and have good confidence you are not utilizing one thing it would not assist.
The assembler reads a supply file on commonplace enter and emits binary bytecode on commonplace output, with the load handle, beginning handle and size encoded within the first six phrases (all phrases are big-endian as divinely meant), adopted by the complete program, adopted by a logo desk. This compound file is what you go to the runtime for execution. By default the runtime simply runs it from the beginning handle and returns to your shell, however when you go -debug, it brings up a facsimile of the FX-series monitor as a substitute for interactive debugging. The disassembler is essentially the most undeveloped of the three, however a minimum of it enables you to see what’s in a binary.
I’ve included a number of pattern scripts within the demo folder. Here is a pattern run, with two CRAP-X check scripts (hello world and a ROT-13 generator), and one of many basic CAP-X ones (add two numbers).
% perl asmbl.pl examples/whats up.cap > whats up.bin
% perl mon.pl whats up.bin
whats up world
% perl asmbl.pl examples/rot13.cap > rot13.bin
% echo 'whats up world in rot13' | perl mon.pl rot13.bin
uryyb jbeyq va ebg13
% echo 'whats up world in rot13' | perl mon.pl rot13.bin | perl mon.pl rot13.bin
whats up world in rot13
% perl asmbl.pl examples/basic/add.cap > add.bin
% perl mon.pl add.bin
GR0 (10) 123
GR1 (10) 456
GR0 (10) 579
% perl mon.pl -debug add.bin
256:Go/Dump/Symbols/^Cal or Hint (Off) t
Hint is On
256:Go/Dump/Symbols/^Cal or Hint (On) s
0000 GO
0006 TAD
256:Go/Dump/Symbols/^Cal or Hint (On) g
Go 0
GR0 (10) 123
0:500A 123 -6000 -25203 -15365
GR1 (10) 456
1:540A 123 456 -25203 -15365
2:D406 123 456 -25203 -15365
3:A006 579 456 -25203 -15365
GR0 (10) 579
4:600A 579 456 -25203 -15365
exiting with SC = 0000
256:Go/Dump/Symbols/^Cal or Hint (On) d
Dump:Object/Register r
BR : 0000 0
GR0: 0243 579
GR1: 01C8 456
GR2: 9D8D -25203
GR3: C3FB -15365
SC : 0000 0
CC : 0000 0
256:Go/Dump/Symbols/^Cal or Hint (On) d
Dump:Object/Register o
from 0
from 0 to 10
from 0 to 10
0:500A READ 00 10
1:540A READ 10 10
2:D406 ST 10 6
3:A006 ADD 00 6
4:600A WRITE00 10
5:0000 HJ 00 0
6:01C8 HJ 01 200
7:0000 HJ 00 0
8:0000 HJ 00 0
9:0000 HJ 00 0
10:0000 HJ 00 0
256:Go/Dump/Symbols/^Cal or Hint (On) c
%
Within the classic examples folder, I’ve additionally included PC-5 appropriate variations of the Rock Paper Scissors sport you simply noticed, the addition program from earlier (each the little “whats up world” one and the unsigned adder), the GCD program from earlier, the Xorshift RNG as an limitless loop of random numbers, and even a Nim misère sport I tailored from the First Book of KIM. I’ve additionally included all our check instances in the edges folder so you may check them your self.
Within the full CRAP-X examples folder, you will discover the whats up world and ROT-13 packages, plus an enhanced Rock Paper Scissors with correct prompts and inputs. To show a minimum of a obscure form of Turing completeness, or a minimum of as a bounded-storage machine, I’ve additionally included a Subleq machine example that implements most likely essentially the most helpful of the one-instruction set computer systems and embeds a whats up world program in Subleq that it’s going to run. Notice that for lengthy packages you’d have to implement separate pages with their very own copy of the Subleq interpreter and determine some option to bounce round on branches, an train left for the actually obsessed.
Let’s end the story. Given all of the structure’s idiosyncracies, in my estimation there is not any good technical motive why Sharp included CAP-X/COMP-X, particularly on items that already had an (virtually definitely sooner) native code execution characteristic. To make certain, such code is working straight on the metallic, so when you screw up it might lock up the machine till reset or corrupt anything in reminiscence. Nonetheless, Sharp had already embraced this danger for excellent reward, significantly with the hardcore PC-1500/Tandy PC-2, so CAP-X/COMP-X did not actually add any new technological capabilities and native machine language packages would have had infinitely larger entry to the {hardware}. With that in thoughts, Sharp’s curiosity within the structure seems to have been purely for the aim of including simply one other characteristic.
However Casio had but to supply assist for native meeting on any of its pocket computer systems up thus far. What CAP-X/COMP-X gave it was a sooner runtime that was totally trappable and guarded, plus (like Sharp) being a public commonplace by then that — a minimum of in Japan, anyway — was one thing their buyer base would discover worthwhile understanding. A COMP-X program cannot run wild and trash your BASIC packages, it may be halted with the BRK key if it will get caught, and it may be debugged and stepped by way of instruction by instruction. Certain, it was cumbersome and convoluted, however Casio COMP-X packages have been a lot swifter than Casio BASIC even when you might get extra BASIC code in, and in contrast to bare machine code have been completely secure to run. Now, if solely Casio had allowed you to combine CAP-X code and BASIC, and/or retailer a number of CAP-X/COMP-X packages in reminiscence without delay like BASIC can, we might have had the most effective of each worlds with sooner code and BASIC comfort. Plus, what fashionable commonplace do we all know that gives you a contrived digital machine however has no “I/O,” so to talk, of its own?
It must also be noticed that for as dire an meeting language as CAP-X/COMP-X is, it was by no means meant to be something aside from a way of ability evaluation, and positively not for programming within the massive. As such we actually cannot blame MITI for Japanese tech firms, perceiving a possible market in a language that probably consumers would possibly wish to study and required no licensing charges, sticking it of their merchandise as a value-added characteristic. It should have been price it to these firms, too: in 1986 MITI launched a successor to CAP-X/COMP-X in that yr’s ITEE, which was named CASL/COMET (CASL being the meeting language, allegedly for “Widespread Algebraic Specification Language,” and COMET being the digital machine), and inside months Sharp and Casio had launched CASL-compatible pockets, suggesting the characteristic generated a minimum of some gross sales. The primary CASL/COMET pocket pc, the 1986 Sharp PC-1445, was nearly an identical to the CAP-X/COMP-X PC-1440 in any other case, altering solely the ROM and the names on the bezel and key (as was the PC-1417G, derived from the PC-1416G). Casio adopted swimsuit with the 1987 FX-840P, derived from the FX-850P, and placing the characteristic on the case for the primary time. Nonetheless, Tandy imported neither unit, and whereas they have been offered in Japan and to a point in Europe they’re moderately uncommon in the USA. Though Casio did launch yet another FX-770P-based mannequin, the FX-795P in 1987 with 16K of RAM, the CAP-X mode was utterly eliminated and changed with extra specialised math operations (matrix math, calculus and even complicated numbers).
CASL/COMET is comparable conceptually to CAP-X/COMP-X and can be a 16-bit system, but it surely makes use of 32-bit instruction phrases to accommodate 23 operations, a full 16-bit handle/rapid subject, and an extra fourth GPR, which additionally serves because the stack pointer. Whereas nonetheless not true load/retailer, it did have an instruction to load an efficient handle a la Intel lea that might add the worth of the required index GPR to the goal GPR concurrently with a relentless, lastly supporting restricted register-to-register math (and if the index register was zero, it did double obligation as a 16-bit load rapid). There was additionally no extra base register and no extra segmentation, a extra helpful situation subject register was added, and particular directions to learn and show whole strings changed the clumsy READ and WRITE. CPUs had develop into much less quirky, so CASL/COMET grew to become much less quirky too. That additionally made it a lot nicer to program in, although correspondingly a lot much less fascinating as an esolang.
CASL/COMET had different implementations, together with this one for the NEC PC-9800 that I noticed on a Japanese public sale web site, however its most fascinating look in pocket computer systems was as a part of the outstanding Casio PB-1000 household. The PB-1000 had a a lot bigger 192×32 dot-addressable LCD that might show 4 strains of 32 characters and 8K of RAM (supporting as much as 40K), and whereas nonetheless based mostly on the HD61700, Casio supported programming it straight in meeting — apart from the 1987 PB-1000C, wherein Casio changed the HD61700 assembler with CASL/COMET. In 1989, Casio launched the PB-1000’s successor, the PB-2000C. This unit saved the identical display screen however eradicated the clamshell and got here with 32K of RAM (supporting as much as 64K with an RP-33), plus a ROM slot for cartridges. Notably, the unit is programmable in real, honest to goodness C with an on-board compiler and editor. The cartridges included BASIC, a surprisingly credible pocket Prolog implementation (a subject of a future post) … and CASL/COMET.
The final CASL/COMET Casio I might discover was the 1989 Casio VX-4, a Japan-only transforming of the HD61700-based FX-870P with 18K RAM (expandable to 50K with an RP-33) that supported BASIC, CASL/COMET and C all in the identical unit. This machine can be notable for a “secret” built-in self-test accessible with the undocumented command SYSTEM *. Close to as I can decide, Sharp by no means issued any others of its personal.
In 2001 CASL/COMET was revised into CASL II and COMET II, including extra register-to-register operations, increasing the register file, including an overflow situation bit, and altering the instruction combine in addition to reversing the bit order (essentially the most vital bit is now 15). Being the present dialect of the language on at present’s ITEE, CASL/COMET II has a number of open supply implementations together with PyCASL2/PyCOMET2 and a Java conversion. However by then pocket computer systems had given option to PDAs and graphing calculators and the structure has but to grace a handheld from the manufacturing unit once more, so in order for you it in your Android, I suppose you will have to jot down it your self. That is ok for a passing grade, is not it?
One parting thought earlier than we shut: why on earth would MITI have put in all these weird quirks? Most likely as a result of so many different modern programs had related quirks of their very own and we have already identified a number of. COMP-X wasn’t speculated to be a super CPU — it was speculated to be a actual one, and actual ones again then have been furry. CPUs have been far more primitive and numerous their bizarre edges can be unashamedly uncovered to the programmer, and a reliable IT skilled of the period would have wanted to account for them. Actual world code needed to work and be achievable despite these idiosyncrasies. Or, put extra succinctly, CAP-X/COMP-X sucks as a result of it was designed to.
The Perl “CRAP-X” reimplementation of CAP-X/COMP-X is on Github underneath a 3-clause BSD license.