Intel broadcasts new FPGA households
Picture supply: Intel PSG
Intel has introduced these new/future FPGA families:
For midrange FPGA purposes like studio cameras, 8K video transport, and wi-fi infrastructure.
This new household incorporates an upgraded onerous processor system (HPS), Enhanced DSP with AI Tensor Block, MIPI I/O help, and a hardened time-sensitive community controller (TSN). Intel Agilex D-Collection gadgets additionally preserve options from earlier households just like the 2nd-generation Intel® Hyperflex™ FPGA Structure and high-speed SerDes transceivers.
Future Intel® Agilex™ FPGAs (codenamed Sundance Mesa)
Below design, for quite a lot of purposes, together with workloads in industrial, broadcast, automotive, communications, shopper, take a look at and measurement, and medical markets.
The brand new Intel Agilex system household inherits lots of a very powerful architectural options of earlier Intel Agilex gadgets together with the second-generation Intel® Hyperflex™ FPGA Structure, which locations Hyper-Registers all through the FPGA.
These gadgets mix the Intel Agilex FPGA cloth with a broad set of mental property (IP) and connectivity choices together with high-speed transceivers that help knowledge charges to twenty-eight.1 Gbps and the PCIe 4.0 interface protocol.
The brand new Intel Agilex system household additionally helps DDR4, LPDDR4, DDR5, and LPDDR5 SDRAM; basic objective I/O with output voltages starting from 1.05 V to three.3 V; as well as a tough processor system (HPS) based mostly on a multi-core Arm Cortex CPU with two Arm Cortex-A76 processor cores that may run as quick as 1.8 GHz and two Arm Cortex-A55 processor cores that may run as quick as 1.5 GHz.
Intel® Agilex™ FPGAs with R-Tile
These gadgets embody the Compute Specific Hyperlink (CXL) mental property (IP) to the Intel Quartus Prime Software program IP library. This CXL onerous + comfortable IP builds upon the present PCI Specific (PCIe) 5.0 capabilities of the Intel® Agilex™ I-Collection and M-Collection FPGAs and SoCs that incorporate “R” transceiver tiles. The preliminary launch of this IP helps CXL v1.1. A deliberate future IP launch will present a software-only improve path for these Intel Agilex FPGAs and SoCs by including help for CXL v2.0.
CXL gadgets shall be utilized in various areas comparable to high-performance computing (HPC), synthetic intelligence (AI), machine studying (ML), knowledge analytics, and different specialised duties.
Direct RF FPGAs Intel® Direct RF FPGAs can carry out direct analog RF sign conversion for a number of analog enter and output channels in quite a lot of topologies supporting as much as 16 channels and varied configurations with channel charges as quick as 64 Gsps.
The brand new gadgets on this portfolio of Intel Direct RF FPGA gadgets now lengthen the I/O capabilities of Intel Agilex and Intel Stratix 10 FPGAs to the analog area utilizing ADC and DAC chiplets which have been co-developed with companions after which composed into packaged gadgets utilizing Intel’s EMIB and AIB applied sciences.