Pentium FDIV bug – Wikipedia

Bug within the Intel P5 Pentium floating-point unit

The Pentium FDIV bug is a hardware bug affecting the floating-point unit (FPU) of the early Intel Pentium processors. Due to the bug, the processor would return incorrect binary floating point outcomes when dividing sure pairs of high-precision numbers. The bug was found in 1994 by Thomas R. Properly, a professor of arithmetic at Lynchburg College.[1] Lacking values in a lookup desk utilized by the FPU’s floating-point division algorithm led to calculations buying small errors. Whereas these errors would in most use-cases solely happen hardly ever and lead to small deviations from the right output values, in sure circumstances the errors can happen incessantly and result in extra important deviations.[2]
The severity of the FDIV bug is debated. Although hardly ever encountered by most customers (Byte journal estimated that 1 in 9 billion floating level divides with random parameters would produce inaccurate outcomes),[3] each the flaw and Intel’s preliminary dealing with of the matter had been closely criticized by the tech neighborhood.
In December 1994, Intel recalled the faulty processors in what was the primary full recall of a pc chip.[4] In its 1994 annual report, Intel stated it incurred “a $475 million pre-tax cost … to get better alternative and write-off of those microprocessors.”[5]
Description[edit]
Graph displaying one manifestation of the FDIV bug. Every information level needs to be ~3.1789 x 10−8 larger on the y-axis than its predecessor to the left, however within the area 4195834.4 < x < 4195835.9 the consequence differs from the anticipated worth by ~8.14 x 10−5.
With a view to enhance the velocity of floating-point division calculations on the Pentium chip over the 486DX, Intel opted to switch the shift-and-subtract division algorithm with the Sweeney, Robertson, and Tocher (SRT) algorithm. The SRT algorithm can generate two bits of the division consequence per clock cycle, whereas the 486’s algorithm may solely generate one. It’s carried out utilizing a programmable logic array with 2,048 cells, of which 1,066 cells ought to have been populated with one in every of 5 values: −2, −1, 0, +1, +2. When the unique array for the Pentium was compiled, 5 values weren’t accurately downloaded into the gear that etches the arrays into the chips – thus 5 of the array cells contained zero when they need to have contained +2.[6]
Consequently, calculations that depend on these 5 cells purchase errors; these errors can accumulate repeatedly owing to the recursive nature of the SRT algorithm. In pathological instances the error can attain the fourth important digit of the consequence, though that is uncommon. The error is normally confined to the ninth or tenth important digit.[3]
Solely sure combos of numerator and denominator set off the bug. One commonly-reported instance is dividing 4,195,835 by 3,145,727. Performing this calculation in any software program that used the floating-point coprocessor, reminiscent of Windows Calculator, would enable customers to find whether or not their Pentium chip was affected.[7]
The proper worth of the calculation is:
When transformed to the hexadecimal worth utilized by the processor, 4,195,835 = 0x4005FB and three,145,727 = 0x2FFFFF. The ‘5’ in 0x4005FB triggers the entry to the ’empty’ array cells. Consequently, the worth returned by a flawed Pentium processor is inaccurate at or past 4 digits:[8]
Discovery and response[edit]
Thomas Properly, a professor of arithmetic at Lynchburg School, had written code to enumerate primes, twin primes, prime triplets, and prime quadruplets. Properly observed some inconsistencies within the calculations on June 13, 1994, shortly after including a Pentium system to his group of computer systems, however was unable to eradicate different components (reminiscent of programming errors, motherboard chipsets, and so on.) till October 19, 1994.[1] On October 24, 1994, he reported the problem to Intel.[9] Intel had reportedly turn into conscious of the problem independently by June 1994, and had begun fixing it at this level, however selected to not publicly disclose any particulars or recall affected CPUs.[10]
On October 30, 1994, Properly despatched an e-mail describing the bug to varied tutorial contacts, requesting studies of testing for the flaw on 486-DX4s, Pentiums and Pentium clones.[9] The bug was shortly verified by others, and information of it unfold shortly on the Internet. The bug acquired the title “Pentium FDIV bug” from the x86 assembly language mnemonic for floating-point division, probably the most incessantly used instruction affected.[9]
The story first appeared within the press on November 7, 1994, in an article in Electronic Engineering Times, “Intel fixes a Pentium FPU glitch” by Alexander Wolfe,[11] and was subsequently picked up by CNN in a section aired on November 22. It was additionally reported on by the New York Occasions and the Boston Globe, making the entrance web page within the latter.[10][12]
At this level, Intel acknowledged the floating-point flaw, however claimed that it was not severe and wouldn’t have an effect on most customers. Intel provided to switch processors to customers who may show that they had been affected. Nevertheless, though most impartial estimates discovered that the bug would have a really restricted influence on most customers, it precipitated important detrimental press for the corporate. Throughout a 2019 speak, whereas reflecting on growth of Quake, John Romero described how incessantly and persistently this bug may very well be reproduced by describing conduct Michael Abrash spent hours monitoring down that might lead to elements of a sport stage showing unexpectedly when seen from sure digital camera angles.[13] IBM paused the sale of PCs containing Intel CPUs, and Intel’s inventory value decreased considerably.[14] The motive behind IBM’s determination was questioned by some within the business; IBM produced the PowerPC CPUs on the time, and probably stood to learn from any reputational harm to the Pentium or Intel as an organization. Nevertheless, the choice led to company patrons of PC gear demanding replacements of present Pentium CPUs, and shortly afterwards different PC producers started providing “no questions requested” replacements of flawed Pentium chips.[4]
The rising dissatisfaction with Intel’s response led to the corporate providing to switch all flawed Pentium processors on request on December 20.[15] On January 17, 1995, Intel introduced “a pre-tax cost of $475 million in opposition to earnings, ostensibly the full value related to alternative of the flawed processors.”[9] That is equal to $783 million in 2021.[16] Intel was criticised for barring resellers and OEMs from taking part within the recall program, requiring end-users to switch chips themselves. Intel’s justification for this, posted on its help net web page, was that “it’s the particular person determination of the top person to find out if the flaw is affecting their software accuracy”.[14]
A 1995 article in Science describes the worth of quantity concept issues in discovering pc bugs and offers the mathematical background and historical past of Brun’s constant, the issue Properly was engaged on when he found the bug.[17]
Intel’s response to the FDIV bug has been cited as a case of the public relations influence of an issue eclipsing the sensible influence of stated drawback on clients.[18] Whereas most customers had been unlikely to come across the flaw of their day-to-day computing, the corporate’s preliminary response to not change chips until clients may assure they had been affected precipitated pushback from a vocal minority of business consultants. The following publicity generated shook shopper confidence within the CPUs, and led to a requirement for motion even from folks unlikely to be affected by the problem. Andrew Grove, Intel’s CEO on the time was quoted in The Wall Road Journal as saying “I feel the kernel of the problem we missed … was that we presumed to inform anyone what they need to or should not fear about, or ought to or should not do”.[4]
Within the aftermath of the bug and subsequent recall, there was a marked enhance in the usage of formal verification of {hardware} floating level operations throughout the semiconductor business. Prompted by the invention of the bug, a way relevant to the SRT algorithm known as “word-level mannequin checking” was developed in 1996.[19] Intel went on to make use of formal verification extensively within the growth of later CPU architectures. Within the growth of the Pentium 4, symbolic trajectory evaluation and theorem proving had been used to seek out quite a lot of bugs that might have led to an identical recall incident had they gone undetected.[20] The primary Intel microarchitecture to make use of formal verification as the first methodology of validation was Nehalem, developed in 2008.[21]
Affected fashions[edit]
The FDIV bug impacts the 60 and 66 MHz Pentium P5 800 in stepping levels previous to D1, and the 75, 90, and 100 MHz Pentium P54C 600 in steppings previous to B5. The 120 MHz P54C and P54CQS CPUs are unaffected.[22][23]
Software program patches[edit]
Varied software patches had been produced by producers to work across the bug. One particular algorithm, outlined in a paper in IEEE Computational Science & Engineering, is to examine for divisors that may set off the entry to the programmable logic array cells that erroneously include zero, and if discovered, multiply each numerator and denominator by 15/16. This takes them out of the ‘buggy’ vary. This repair does carry a measurable velocity penalty – worst case for a program doing nothing however FDIV operations with unhealthy divisors the operating time would double since every FDIV would take about 80 as a substitute of 40 clock cycles. With extra random divisors the typical time per FDIV was roughly 50 clock cycles, i.e. 10 cycles added to examine the divisor: Solely 5 out of 1024 random divisors would set off the scaling fixup. Since FDIV is a uncommon operation in most packages, the traditional slowdown with the repair put in was usually a p.c or much less.[8]
The primary problem confronted by software program corporations was implementing the repair in pre-existing software program, a lot of which relied on libraries outdoors their management. Some corporations, reminiscent of Wolfram Research, opted to immediately patch the machine code of present executables to switch the FDIV opcode with an unlawful instruction. This could then set off an exception that an exception handler (additionally patched in) would catch. From right here, arbitrary code may very well be executed to work across the bug.[2]
Microsoft provided working system stage workarounds in variations of Windows as much as Home windows XP. Utilities had been included with the working system to examine for the presence of the bug and disable the FPU if discovered.[24][25]
See additionally[edit]
References[edit]
- ^ a b Edelman, Alan (January 1, 1997). “The Mathematics of the Pentium Division Bug” (PDF). SIAM Assessment. 39 (1): 54–67. Bibcode:1997SIAMR..39…54E. doi:10.1137/S0036144595293959. Retrieved April 11, 2021.
- ^ a b “‘A Discussion of and Fix for the Pentium FDIV Bug’ from the Notebook Archive (2002)”. notebookarchive.org. Wolfram Analysis, Inc. Retrieved April 11, 2021.
- ^ a b Tom R. Halfhill (March 1995). “An error in a lookup table created the infamous bug in Intel’s latest processor”. BYTE. No. March 1995. Archived from the original on February 9, 2006. Retrieved December 19, 2006.
- ^ a b c Carlton, Jim; Yoder, Stephen Ok. (December 21, 1994). “Computer systems: Humble Pie: Intel to Substitute its Pentium Chips”. The Wall Road Journal (Japanese ed.). p. B1.
- ^ “1994 – Annual Report”. Intel. June 20, 2020. Archived from the unique on February 26, 2017. Retrieved June 20, 2020.
- ^ Sharangpani, H. P.; Barton, M. L. (November 30, 1994). Statistical Analysis of Floating Point Flaw in the Pentium Processor (1994) (PDF) (Report). Intel Company. Retrieved April 11, 2021.
- ^ “Pentium FDIV bug – a Picture”. Kansas College Institute for Coverage and Social Analysis. November 30, 1994. Retrieved November 3, 2010.
- ^ a b Coe, T.; Mathisen, T.; Moler, C.; Pratt, V. (1995). “Computational aspects of the Pentium affair” (PDF). IEEE Computational Science and Engineering. 2 (1): 18–30. doi:10.1109/99.372929. Retrieved April 13, 2021.
- ^ a b c d Properly, Thomas (August 19, 2011). “Pentium FDIV flaw FAQ”. trnicely.web. Archived from the original on June 18, 2019. Retrieved June 18, 2019.
- ^ a b Markoff, John (November 24, 1994). “COMPANY NEWS; Flaw Undermines Accuracy of Pentium Chips”. The New York Occasions. Retrieved April 11, 2021.
- ^ Alexander Wolfe (November 9, 1994). “Intel fixes a Pentium FPU glitch”. Digital Engineering Occasions.
- ^ Moler, Cleve (Winter 1995). “A Tale of Two Numbers” (PDF). MATLAB Information and Notes. MathWorks. Retrieved April 21, 2021.
- ^ “BTD12: The Programming Principles of Id Software”. TNG Expertise Consulting GmbH. August 6, 2019. Retrieved July 17, 2023.
- ^ a b Yeraswork, Zewde (March 30, 2011). “Lessons Learned: Pentium Flaws Aid Intel In Sandy Bridge Chipset Recall”. CRN. Retrieved April 11, 2021.
- ^ “Intel adopts upon-request replacement policy on Pentium processors with floating point flaw; Will take Q4 charge against earnings”. Enterprise Wire. December 20, 1994. Archived from the original on July 10, 2012. Retrieved December 24, 2006.
- ^ Johnston, Louis; Williamson, Samuel H. (2023). “What Was the U.S. GDP Then?”. MeasuringWorth. Retrieved January 1, 2023. United States Gross Domestic Product deflator figures observe the Measuring Price collection.
- ^ Cipra, Barry Arthur (January 13, 1995). “How quantity concept bought one of the best of the Pentium chip”. Science. 267 (5195): 175. Bibcode:1995Sci…267..175C. doi:10.1126/science.267.5195.175. PMID 17791336. S2CID 19898103.
- ^ Worth, D. (April 1995). “Pentium FDIV flaw-lessons realized”. IEEE Micro. 15 (2): 86–88. doi:10.1109/40.372360.
- ^ Clarke, E. M.; Khaira, M.; Zhao, X. (1996). “Word level model checking—avoiding the Pentium FDIV error”. Proceedings of the thirty third annual convention on Design automation convention – DAC ’96. Dac ’96. pp. 645–648. doi:10.1145/240518.240640. ISBN 0897917790. S2CID 2500033. Retrieved April 29, 2021.
- ^ O’Leary, J. (2004). “Formal verification in intel cpu design”. Proceedings. Second ACM and IEEE Worldwide Convention on Formal Strategies and Fashions for Co-Design, 2004. MEMOCODE ’04. p. 152. doi:10.1109/MEMCOD.2004.1459841. ISBN 0-7803-8509-8. Retrieved April 29, 2021.
- ^ Kaivola, Roope; Ghughal, Rajnish; Narasimhan, Naren; Telfer, Amber; Whittemore, Jesse; Pandav, Sudhindra; Slobodová, Anna; Taylor, Christopher; Frolov, Vladimir; Reeber, Erik; Naik, Armaghan (2009). “Replacing Testing with Formal Verification in Intel® Core™ i7 Processor Execution Engine Validation”. Pc Aided Verification. 5643: 414–429. doi:10.1007/978-3-642-02658-4_32.
- ^ “P5 (586) Fifth-Generation Processors | Microprocessor Types and Specifications | InformIT”. www.informit.com. June 8, 2001. Retrieved April 13, 2021.
- ^ “FDIV Replacement Program: Frequently asked questions”. Intel. March 20, 2009. Answer ID CS-012748. Archived from the original on Might 11, 2009. Retrieved November 10, 2009.
- ^ Slob, Arie. “Windows 95 Troubleshooting: How to Check for a Faulty Math Coprocessor”. www.helpwithwindows.com. Retrieved April 23, 2019.
- ^ “Pentnt”. Microsoft TechNet. Microsoft. September 11, 2009. Retrieved April 23, 2019.
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